1. Field of the Invention
This invention relates to wireless communications generally, and more specifically to power management for radio transceivers that employ digital coding and signal processing.
2. Description of the Related Art
Digital radio transceivers employ a variety of digital coding and signal processing methods to achieve communication through noisy and error prone channels. For example, forward error correction (FEC) and interleaving are both commonly used to compensate for channel fading. Such methods are extremely useful, but they come at a cost: increased power usage.
Consider an exemplary channel with no fading. In such a case, a simple radio configuration would suffice to achieve a bit error rate BER of 0.001% using binary phase shift keying at a transmit power of one 2.5 dBm over 100 meters with five dBm noise figure, zero dB nominal antenna gain, and five dBm link margin . In contrast, in the presence of fast fading a transmission can experience and additional 40 dB loss in signal to noise ratio which implies a necessary increase in transmitter power to 52.5 dBm or 178 W. To reduce the required power, most systems employ forward error correction and interleaving to combat the worst case fading scenario. However, such a point solution still results in unnecessary power consumption by the FEC codec and the interleaver in the case where the channel exhibits no fading. For the sake of illustration, assume that an FPGA implementation of a simple BPSK digital modem consumes 10 mw; a similar FPGA digital modem with FEC and interleaving would typically dissipate approximately one watt. Thus, if FEC and interleaving are used in all cases, 100 times more than necessary power would be consumed when the channel exhibits no fading.
In some applications unnecessary power consumption can be tolerated. However, many communications applications rely upon limited power sources such as batteries. In such applications a more efficient power management system is greatly to be preferred.
Current wireless systems already manage power to operate with high-energy efficiency and link performance by various means (e.g. power control). However, they are only point solutions and cannot adequately manage their power and performance for highly dynamic operation scenarios and environments.
In view of the above problems, the present invention provides an adaptive, reconfigurable radio architecture that allows software control of the radio signal processing by reconfiguring digital signal processing modules, and optionally by also reconfiguring analog signal processing modules.
The method of the invention monitors a communication channel and estimates its characteristics from time to time, thus providing a dynamic estimate of channel characteristics. Based on the channel characteristics, a control processor calculates a preferred configuration of digital (and optionally, analog) signal processing to best manage the available energy for the present channel characteristics. The selected configuration is then down-loaded into communication modules stored in extra memory during runtime. The communication modules preferably include one or more of: a reconfigurable forward error correcting codec (with adjustable code lengths, enabled or disabled states, and a plurality of code choices); a reconfigurable interleaver with adjustable depth; a decision feedback equalizer (DFE) with a reconfigurable number of taps; maximum likelihood sequence estimator with an adjustable number of states; a frequency hopping coder with an adjustable number of hops or hop rate; and a direct-sequence (or direct sequence spread spectrum) codec with an adjustable number of chips per bit. Each module is preferably well characterized so that the amount of energy required per information bit transmitted and received is known. Each module is adequately parameterized such that different instances may be reconfigured dynamically, in response to commands from the control processor, on a field programmable gate array (FPGA) or other type of reconfigurable hardware to provide appropriate signal processing for the dynamic channel conditions as measured.
An apparatus in accordance with the invention includes: a channel monitor which produces estimates of the communication channel""s characteristics; a programmable processor arranged to receive estimates from said channel monitor, and programmed to compute preferred signal processing configuration based upon said estimates; at least one reconfigurable digital signal processing module, arranged to receive commands from said programmable processor and to reconfigure in response to said commands; and a radio transceiver, with inputs from said reconfigurable signal processing module and outputs to said reconfigurable signal processor module, for sending and receiving radio signals.
These and other features and advantages of the invention will be apparent to those skilled in the art from the following detailed description of preferred embodiments, taken together with the accompanying drawings, in which: